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JimmyZ is blocked on alias_analysis branch because luajit using trace compiler and he does't know how to search the related ops in cfg to use alias analysis in a cheap way. | 08:18 | ||
brrt | ok, JimmyZ, I think I can help you there a bit | 08:24 | |
although my knowledge of this is purely theorethical | 08:25 | ||
(is it theorethical or theoretical?) | |||
spesh computes the SSA 'form' of the graph | 08:26 | ||
which means that each register operand of each instruction has the original register index as well as the ssa-register index | 08:27 | ||
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brrt | this ssa register index is really the same as a identifier to when the value was last set | 08:28 | |
so if you have an instruction with a source register operand and whish to know where this was computed, you walk back to find an instruction with a destination register operand with the same ssa index | 08:30 | ||
i... think this is always possible walking back | 08:31 | ||
but jnthn might know better | |||
(because of phi nodes) | |||
it is potentially possible, if a basic block is out of order, to use a ssa register which was defined later, but at least it must be on the list of predecessors | 08:34 | ||
in fact, that seems to be only possible if there is a single predecessor, otherwise there must be a phi node? | |||
or the code would use an undefined register | 08:35 | ||
e.g. suppose we have the following linear sequence: a -> b -> c | |||
and the following code sequence (using unconditional jumps): a -> c -> b | |||
and b uses register 42, which has been set in c but not in a | 08:36 | ||
then you should be able to find register 42's (only) assignment by walking from b to it's predecessor c, but not in a | 08:37 | ||
now what i'm not sure of, is if the linear predecessor is necessarily a predecessor in spesh, i think not | 08:38 | ||
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JimmyZ | It's really hard :) | 09:09 | |
brrt: I want to exchange orig and i in MVMSpeshOperand, but it cause segfault in jit | 09:12 | ||
disable jit works fine | 09:13 | ||
brrt | don't excahnge orig and i | ||
that doesn't make sense | |||
JimmyZ | why? | ||
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brrt | for one thing, because some i's start from (1 << 16) and upward | 09:14 | |
which is much larger than the register size | 09:15 | ||
if any code uses the reg.i in the JIT, then that is very much a bug | |||
(moarvm register array size that is) | |||
JimmyZ | I want to do it because I want to cover reg to lit_i64 for esay test is two Oprerand is equal or not | ||
brrt | but also because the orig refer to actual locations that are actually allocated, and i is really an identifier | ||
cover = convert? | 09:16 | ||
JimmyZ | yeah | ||
brrt | hmmm | ||
when do you do that? | |||
JimmyZ | alias analysis | 09:17 | |
brrt | but... i'm not sure i get it | 09:18 | |
how do you wish to do that? | |||
is there a commit that does this? | |||
JimmyZ | brrt: github.com/MoarVM/MoarVM/blob/alia.../mem.c#L77 | ||
brrt | uhm... why'd you do that | 09:22 | |
there are plenty of cases in which the upper bits of the i64 are not set :-) | |||
you might accidently see them as equal, or not as equal | |||
JimmyZ | I need test orig and i together? | 09:23 | |
brrt | hmmm | ||
why not check for equality of reg | |||
and have the compiler figure the details out | |||
JimmyZ | test.c:21:11: error: invalid operands to binary == (have āstruct <anonymous>ā and āstruct <anonymous>ā) | 09:25 | |
if(test.r == test2.r) { | |||
y | |||
like this? | |||
brrt | hmmm | ||
ok, when i'm wrong i'm wrong | |||
yes like that :-) | |||
JimmyZ | luajit does the way by convert it to a value | 09:26 | |
brrt | luajit makes a whole lot of assumptions about luajit | ||
mostly because it was made by one man | 09:27 | ||
but yeah, does this crash in the JIT? | |||
JimmyZ | brrt, it crash if I changed it | ||
brrt | hmmm | ||
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brrt | if this code would crash the JIT it would be a JIT error :-) so that's one thing | 09:28 | |
JimmyZ | and LARGE_INTEGER on windows does same thing like covert two small int to big int | ||
brrt | ok, let's suppose it is ok :-) | 09:34 | |
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brrt | i would think that having the same i would imply the same orig | 09:36 | |
JimmyZ | but same version not means same orig | 09:37 | |
is i means version? | 09:38 | ||
brrt | no, i is identifier | 09:44 | |
and it identifies an assignment :-) | |||
so - unless something like set is special cased and keeps i equal over different registers - same i means same orig | 09:45 | ||
but i really doubt that set is special cased | |||
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JimmyZ | for r(1) ,Is i = 1? | 09:50 | |
looking at codes in rename_locals, looks like it is | 09:51 | ||
r2(1) | 09:52 | ||
brrt | yes | 09:53 | |
hmmm | |||
ok, maybe jnthn can shed some light there | |||
because that is very much true :-) | |||
maybe i is really only an identifier for the same register | |||
JimmyZ | yeah, but I still need to test if it's the same reg, convert them into a value means I only need to test once | 09:55 | |
if I exchange orig/i then I can do it,but it breaks jit :( | |||
brrt | how do you wish to exchange orig and i | 10:14 | |
if i understand it like you say it, then it doesn't make sense, not just for the JIT | 10:16 | ||
JimmyZ | better memory algin | 10:17 | |
brrt | ah..a | ||
as in, in the struct | |||
ok, that's pretty wrong | 10:18 | ||
:-) | |||
ok, can you file a github issue with a patch so that i can test it? | |||
JimmyZ | gist.github.com/zhuomingliang/6c25...fcf4d538ad | ||
brrt: I have a test, if int32 is after int16, then .r is not the same | 10:19 | ||
what patch? exchange? alias_analysis branch has the patch | 10:20 | ||
so you could test it on that branch | |||
brrt | ok, let me read that :-) | 10:21 | |
JimmyZ | github.com/MoarVM/MoarVM/commit/e7...bb2d52L198 | ||
brrt | quite right | 10:23 | |
if you change them, they're not equal | |||
huh | 10:24 | ||
doesn't that add two orig fields | |||
oh no | |||
i'm wrong | |||
nm | |||
hmm | 10:25 | ||
i still don't like the sneaky conversion to lit_i64 for comparison :-) | |||
but still | |||
if that breaks the JIT, that's a JIT bug | |||
and I have to investigate | |||
the JIT should be reading .orig at all times | |||
JimmyZ | brrt: I don't like conversion too, but since it saves a test op ... and others does the same way :P | 10:30 | |
decommute | |||
brrt | that doesn't convince me though | 10:37 | |
but i'll change it and see what happens | |||
jnthn | Do NOT compare MVMSpeshOperand.reg by converting it. Just write a function that compraes the orig and the i. Too much risk of screw-up on machines of different endianness etc otherwise. Not to mention confusing code. | 10:54 | |
This stuff is hard enough already. Being more clever than you need to be in the code is just unhelpful. | |||
I read the allocation sinking stuff on the plane. It's not especially clear how to apply it in a MoarVM scenario. | 10:55 | ||
Because it is muchly defined in terms of trace JIT things. | |||
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brrt | (on the plane? flying again) | 10:57 | |
jnthn | A few days ago :) | 10:58 | |
brrt | :-) | ||
jnthn | To family, for Christmas | ||
brrt | nice | ||
i'll have to go by train tomorrow | |||
and i'll be reading a long reader on system analysis and design rather than code :-) | |||
jnthn | Doing that after Christmas to get to other bit of family. :) | 10:59 | |
brrt | i suspect the JIT uses lit_i16 where it should use reg.orig somewhere | ||
jnthn | Yeah, that is possible | ||
orig is the actual register in the original bytecode, and i is the SSA version. We actually do this just like the paper, that is write variables with a version index. | 11:00 | ||
Then conversion out of SSA form just involves dropping the versions again. | |||
brrt | so i is a version index? why do some of them get so large | ||
or is that an artefact of the proces | 11:01 | ||
jnthn | Usually because long routine + compiler tries to re-use registers, and SSA is unpicking all of that. | ||
brrt | aha | ||
hmm | |||
so when i said that some start counting from 1<<16 up, i was wrong? | 11:02 | ||
:-) | |||
jnthn | I thought it went from 0 for versions | ||
And they're numbered via the dominance tree iirc | |||
Anyways, seems family have food ready for me so I should go and eat it :) | 11:03 | ||
Have a nice Christmas, y'all :) | |||
brrt | yes, you too | 11:05 | |
merry christmas | |||
(also, how is everybody already celebrating christmas, /me is still at work) | |||
FROGGS__ | I'm off work since monday, which was a good decision because there was so much to prep | 11:06 | |
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JimmyZ | jnthn: merry christmas | 11:48 | |
JimmyZ still is at work too | 12:00 | ||
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JimmyZ | jnthn: about Because it is muchly defined in terms of trace JIT things. Didn't we have a roadmap about Trace JIT? ;) | 15:14 | |
timotimo | JimmyZ: what does the alias analysis thing do so far? or what can it already do/what can be implemented using it? | 15:15 | |
JimmyZ | timotimo: the Allocation sinking need it. and I find moarvm's alias analysis is much more complex than luajit :( | 15:17 | |
timotimo | i feared as much :( | 15:18 | |
JimmyZ | well, not only Allocation sinking need it, itself is very nice thing | 15:19 | |
timotimo | right | 15:20 | |
JimmyZ | i.e: x = obj.x; .....; y = obj.x + i; and make the later obj.x a alias to x is very nice | ||
or, e = @a[x+1]; ..... ; y = @a[x+1] + i; | 15:21 | ||
timotimo | ah | ||
so it's a tiny bit like common subexpression elimination | 15:22 | ||
JimmyZ | oh yeah, a bit like | 15:26 | |
x+1 part is cse and @a[x] is aa, me thinks. | 15:27 | ||
and sometimes I'm confused ... | |||
timotimo: alias analysis mostly is for two object, cse is not | 15:31 | ||
like obj1.x and obj2.x, is obj1 and obj2 may be ailas | 15:33 | ||
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JimmyZ | so the two example is actullay cse .... and ojb1 vs obj2 is aa | 15:46 | |
dalek | arVM/alias_analysis: 8f5a7ab | (Jimmy Zhuo)++ | src/spesh/mem.c: Add basic alias analysis for object |
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JimmyZ | timotimo: en.wikipedia.org/wiki/Alias_analysis | ||
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