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brrt good * #moarvm 07:16
timotimo good good 07:17
brrt ohai timotimo 07:20
i've better news than before
hmmm
no scrap that
okay it's still better news
so i figured out that i know exactly when a tiles values are fully defined, and that 's prior to the allocation of a new register for a live range that starts afterwards 07:23
(i'm thinking of a solution for the two-operand-form-problem that doesn't involve me reserving a register)
i'm probably not going to implement that just yet because resserving a registe ris sooo much easier 07:25
*register
timotimo yeah, i'd go with the easier route, too
it's potentially easy to change it later on 07:26
brrt nods
timotimo whatever gets us towards everybody being able to contribute earlier ;)
brrt but i feel it's also useful to explore the design space a bit as well
:-)
timotimo that's also true
brrt commutative, is the word i'm looking for 07:28
binary operations like ADD, OR, AND, MUL, they are commutative
others like SUB,XOR,LEFTSHIFT,RIGHTSHIFT, they're not 07:29
timotimo right
do we gain a lot from switching the arguments around?
brrt well, if we don't have to switch the arguments arround, then r0 = r0 <op> r1 the same thing if r0 == r1 and if r0 == r2 07:30
(the same thing as r0 = r1 <op> r2)
timotimo fair enough 07:31
brrt so in that case, it's never necessary to allocate an extra register 07:32
or to issue a copy
non-commutative operators, they do have to be copied, because r1 = r1 <op> r2 overwrites r1 (which is invalid), while r2 = r2 <op> r1 is something else 07:33
(this of course is only relevant if r0 == r2)
timotimo fair enough, yeah
brrt i have… another solution, yes 07:40
basically; for all live ranges that have a single definition, their only definition is fully defined (registers are completely filled in) at the point of register allocation, because all its dependencies live in earlier live ranges 07:41
so for those cases, i can check a): if it's a direct binary non-commutative operater were' implementing 07:42
b): ensure that r0 != r2 if that is so
if they have multiple definitions, and some of those are direct non-commutative binary operators, then i can 'split' them off into single-deifnition live-ranges with a *copy* to our current live range 07:44
yes, precious…. *gollum*
timotimo %) 07:45
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brrt obviously there's a new matter of complexity there 07:45
if i do that, then my current assumption that (two synthetic live ranges are enough for everyone) is no longer enough for everyone
does… any of this make any sense 07:48
timotimo well, yeah 07:50
now you need to care about one more register all the time
brrt well, we have registers, that's not really it… 07:52
hmmm
timotimo i might have misunderstood or miscommunicated?
brrt well, it is i who has miscommunicated, if anyone 07:53
please allow me to check
what do you think is my issue?
(if you're wrong, it's my mistake, btw :-))
timotimo well, since we might have to have that extra register to swap around before a two-operand register, that register has to be accounted for, so another live range appears 07:54
is that not it?
brrt well, mostly; that's actually the solution i had in mind 07:56
timotimo i'm not sure i'm understanding everything, or if i'm just subconsciously bullshitting my way through our conversations :D
brrt as long as i believe it :-D 07:57
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timotimo sleep has ended too soon, and instead of feeling energized and lively from getting up early, i feel drained :\ 08:03
maybe i'll try to sleep a little bit more, and then maybe i'll tackle what samcv left for me to do 08:05
brrt sleep well 08:06
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brrt aargh, i've broken the register allocator canary :'-( 08:07
timotimo good thing it's there 08:08
brrt yeah i suppose
bbl
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timotimo so ... making shifts work properly is fun 14:16
there's a function that takes one 16bit piece and spits out three characters into the array you point it at
we now need an extra flag that gets communicated to signify "the last of the three was a 'initiate the shift' command" so that the first one in the next bit can properly be interpreted 14:17
it very much looks like i want to build a little struct like our SerializationReader and Writer structs 14:19
i think i want to have something like a queue that gets fed the un-tripled 16bit numbers 14:20
and a following "pipeline stage" would nom single bits out and if there's nothing left it'll ask for a refill 14:21
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timotimo AFKBBL 14:35
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Geth arVM/even-moar-jit: e261922d44 | (Bart Wiegmans)++ | 3 files
Define properties on expression ops

Flag negation is an expression op property, as is binary-noncommutativeness.		 15:03
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timotimo running this errand left me a lot more exhausted than i thought 17:02
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brokenchicken should've walked that errand! :) 17:40
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timotimo clearly 17:58
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timotimo well, my first attempt at running the code i wrote results in tortured screams 18:42
U+0 'A'
U+1 'A'
U+2 'A'
U+3 'A'
U+4 'A'
U+5 'A'
[...]
U+85D02 'A'
U+85D03 'A' 18:43
U+85D04 'A'
U+85D05 'A'
haha, now it's SPA SPA SPA SPA SPA SPA
someone desparately needs some vacation, i see
diakopter :p 18:44
brokenchicken :) 18:45
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timotimo U+44 'HYPIGNWRITING' 18:50
U+45 'HENIGNWRITING'
U+46 '-MIIGNWRITING'
U+47 'NUSIGNWRITING'
U+0 'SPACE' 18:52
U+1 'EXCLAMATION MARK'
U+2 ''
U+3 'QUOTATION MARK' 18:53
U+4 'NUMBER SIGNWRITING'
that looks good!
ah, i know where the empty strings come from at least 18:54
looks like encoding has an off-by-one for the shift-table 18:56
such that istead of SIGN it gives SIGNWRITING for the first few codepoints
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timotimo got it to work it seems like 19:22
still at least one bug 19:24
U+74C6 'MARTIAL ARTS UNJ'
U+74C7 ''
U+74C8 'CROISSANT'
is supposed to be MARTIAL ARTS UNIFORM, then CROISSANT
but i need really early rest today
github.com/samcv/UCD/pull/1 - samcv, you'll get this per mail, too, but i figure i'll guide any sort of discussion into the channel here as well 19:28
ah i know why UNIFORM gets mangled 19:33
there's a 40th entry in the shift one table, which is UNIFORM, but it can't be coded properly, because we can only do up to 39 (because we also have 0) 19:34
sorry, not UNIFORM. it's FORM of course
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timotimo today: 19:40
pasting the shift one list into pidgin makes it freeze and consume 100% cpu on one core
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