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github.com/moarvm/moarvm | IRC logs at colabti.org/irclogger/irclogger_logs/moarvm Set by AlexDaniel on 12 June 2018. |
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| brrt | \o #moarvm | 08:19 | |
| a different register allocation algorithm is starting to sound attractive | |||
| nwc10 | o/ | 08:20 | |
| based on bogosort? Or it's not that bad, *yet*? :-) | |||
| brrt | not that bad yet | 08:25 | |
| want the gory details? | |||
| or the short summary? :-P | 08:26 | ||
| nwc10 | it's all, um, I'm all teddy-bear to it | ||
| so, I think that the short summary is more useful | |||
| brrt | the short summary is, linear scan, as a greedy algorithm, is great at just handing out registers fast. But it is considerably less great when there are constraints on what registers to hand out | 08:27 | |
| now maybe there is a way out of there that I don't know yet | |||
| a hint bitmap that we collect... hmmm | |||
| but the thing is, x86-64 ISA is full of constraints like those | 08:28 | ||
| maybe what I really want is linear scan for something more regular (ARM perhaps), and something more complex for x86-64 | |||
| nwc10 | but right now you're working on x64-64, and "ARM JIT" is just an optimistic sentance? Hence solving the problem for x86-64 matters? | 08:30 | |
| brrt | correct | ||
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| nwc10 | and so by the time x86-64 is solved, it might still be just as easy to keep using the same approach for ARM (or arm64, which might be the only thing that matters by then) | 08:30 | |
| er, I forget, they call it aarch64? | 08:31 | ||
| brrt | yeah, it's weird | ||
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| brrt | \o | 22:36 | |
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